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On-Chip Training Npu - Algorithm, Architecture and Soc Design (in English)
Hoi-Jun Yoo
(Author)
·
Donghyeon Han
(Author)
·
Springer
· Hardcover
On-Chip Training Npu - Algorithm, Architecture and Soc Design (in English) - Han, Donghyeon ; Yoo, Hoi-Jun
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Synopsis "On-Chip Training Npu - Algorithm, Architecture and Soc Design (in English)"
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.
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All books in our catalog are Original.
The book is written in English.
The binding of this edition is Hardcover.
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