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portada Research Infrastructures for Hardware Accelerators (in English)
Type
Physical Book
Publisher
Language
English
Pages
85
Format
Paperback
Dimensions
23.5 x 19.1 x 0.5 cm
Weight
0.19 kg.
ISBN13
9783031006227
Edition No.
1

Research Infrastructures for Hardware Accelerators (in English)

David Brooks (Author) · Yakun Sophia Shao (Author) · Springer · Paperback

Research Infrastructures for Hardware Accelerators (in English) - Shao, Yakun Sophia ; Brooks, David

Physical Book

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Synopsis "Research Infrastructures for Hardware Accelerators (in English)"

Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently. Historically, the computer architecture community has focused on general-purpose processors, and extensive research infrastructure has been developed to support research efforts in this domain. Envisioning future computing systems with a diverse set of general-purpose cores and accelerators, computer architects must add accelerator-related research infrastructures to their toolboxes to explore future heterogeneous systems. This book serves as a primer for the field, as an overview of the vast literature on accelerator architectures and their design flows, and as a resource guidebook for researchers working in related areas.

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All books in our catalog are Original.
The book is written in English.
The binding of this edition is Paperback.

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